Baker, R Jacob. <br/>
Cmos circuit design layout and simulation. 

 - New Delhi  Prentice Hall of India  2000 
 - 23 cm.  902 page  1  23 cm. 
<br/><br/><label>ISBN: </label>81-203-1682-7 
<br/><br/><label>Standard No.: </label> Availalge 
<br/><br/><label>Source: </label> Available 
<br/><br/><label>Subjects--Personal Names: </label>
<br/><br/><label>Subjects--Topical Terms: </label>
<br/><br/><label>Dewey Class. No.: </label>621.38132 BAC